Packaging refers to connecting the circuit pins on the silicon chip to the external joints with wires to connect with other devices. The packaging form refers to the housing for mounting semiconductor integrated circuit chips. It not only plays the role of mounting, fixing, sealing, protecting the chip and enhancing the electrothermal performance, but also connects to the pins of the package shell with wires through the contacts on the chip, and these pins pass the wires on the printed circuit board. Connect with other devices to realize the connection between the internal chip and the external circuit. Because the chip must be isolated from the outside world to prevent impurities in the air from corroding the chip circuit and causing electrical performance degradation.
On the other hand, the packaged chip is also easier to install and transport. Since the quality of packaging technology also directly affects the performance of the chip itself and the design and manufacturing of the PCB (printed circuit board) connected to it, it is very important.
An important indicator to measure whether a chip packaging technology is advanced or not is the ratio of chip area to packaging area. The closer this ratio is to 1, the better.
Main considerations for packaging
In order to improve the packaging efficiency, the ratio of the chip area to the package area should be as close as possible to 1:1; the pins should be as short as possible to reduce delay, and the distance between the pins should be as far as possible to ensure that they do not interfere with each other and improve performance; based on heat dissipation requirements, the package The thinner the better.
The development history of packaging
Structure: TO->DIP->PLCC->QFP->PGA->BGA ->CSP->MCM;
Material aspect: metal, ceramic -> ceramic, plastic -> plastic;
Pin shape: long lead in-line -> short lead or no lead mounting -> ball bump;
Assembly method: through-hole insert->surface assembly->direct installation
There are different classification methods for packages. According to the shape, size and structure of the package, it can be divided into pin insertion type and surface mount type (SMD, the abbreviation of Surface Mounted Devices, meaning: surface mount device, which is SMT (Surface Mount Technology, surface mount technology) One of the components) and advanced packaging.
From different perspectives, the classification methods are roughly as follows:
According to the loading method of the chip; according to the substrate type of the chip; according to the sealing or packaging method of the chip; according to the packaging material of the chip, etc.; according to the external structure of the chip.
The first three categories belong to the category of first-level packaging and involve the packaging or sealing of bare chips and their electrodes and leads. The author will only briefly explain them. The latter two categories belong to the category of second-level packaging and are of great use to PCB design. Detailed analysis.
1. Classified by chip loading method
When a bare chip is loaded, its electrode side can face up or down. Therefore, the chip is divided into a front-mounted chip and a flip-chip. The wiring side is facing up as a front-mounted chip, and vice versa.
In addition, when the bare chips are loaded, their electrical connection methods are also different. Some use wire bonding, and some use wireless bonding.
2. Classified by chip substrate type
The role of the substrate is to carry and fix the bare chip, and at the same time have insulation, heat conduction, isolation and protection. It is a bridge between the internal and external circuits of the chip. From the material point of view, the substrate is divided into organic and inorganic points. From the structural point of view, the substrate There are single-layer, double-layer, multi-layer and composite.
3. Classified by chip sealing or packaging method
The packaging or sealing methods of bare chips and their electrodes and leads can be divided into two types, namely airtight packaging and resin packaging, and airtight packaging can be divided into metal packaging according to different packaging materials. There are three types of ceramic package and glass package.
4. Classified by chip packaging materials
According to the packaging materials of the chip, there are: metal packaging, ceramic packaging, metal-ceramic packaging, and plastic packaging.
Metal packaging: metal materials can be punched and pressed, so it has the advantages of high packaging accuracy, strict size, easy mass production, and low price.
Ceramic packaging: Ceramic materials have excellent electrical properties and are suitable for high-density packaging.
Metal-ceramic package: both have the advantages of metal package and ceramic package.
Plastic packaging: Plastic has strong plasticity, low cost, simple process, and is suitable for mass production.
5. According to the appearance and structure of the chip, there are roughly:
DIP, SIP, ZIP, S-DIP, SK-DIP, PGA, SOP, MSP, QFP, SVP, LCCC, PLCC, SOJ, BGA, CSP, TCP, etc., among which the first 6 are pin insertion types, and the following 9 One is surface mount type, and the last one is TAB type (Tape Automated Boning), which is an integrated circuit packaging technology based on assembling chips on a metalized flexible polymer carrier tape. Its The process is mainly to form bumps on the chip first, and automatically bond the bumps on the chip with the solder joints on the carrier tape through a wire bonding machine, and then seal and protect the chip. The carrier tape is used as the chip. The support body is also used as the connection lead between the chip and the surrounding circuit).
DIP: Dual in-line package. As the name suggests, this type of pins are arranged on both sides of the chip. It is the most common type of plug-in package. The pin pitch is 2.54 mm. It has excellent electrical performance and is good for heat dissipation. Can be made into high-power devices.
SIP: Single in-line package, this type of pins are arranged on one side of the chip, and the pin pitch and other characteristics are basically the same as DIP. ZIP: Z-pin in-line package, this type of pin is also on the chip single Side arrangement, but the pins are thicker and shorter than SIP, and features such as pitch are basically the same as DIP.
S-DIP: Shrink dual in-line package. This type of pin is arranged on both sides of the chip, with a pin pitch of 1.778 mm, and the chip integration is higher than DIP.
SK-DIP: narrow dual in-line package, except that the width of the chip is 1/2 of DIP, other features are the same as DIP, PGA: pin grid array plug-in package, the bottom surface of the package is arranged in a vertical array of pins, like The pin grid has a pin pitch of 2.54 mm or 1.27 mm, and the number of pins can reach hundreds of pins. It is used for high-speed and large-scale and very large-scale integrated circuits.
SOP: Small outline package, a kind of surface mount package. The pin terminals are drawn from the two sides of the package, the letter is L-shaped, and the pin pitch is 1.27mm.
MSP: Micro-square package, a type of surface mount package, also called QFI, etc. The pin terminals are drawn from the four sides of the package, extending downward in an I shape, and there is no protruding part, and the actual installation takes up area Small, the lead pitch is 1.27mm.
QFP: Quad flat package, a type of surface mount package. The pin terminals are drawn from the two sides of the package and are L-shaped. The pin pitch is 1.0mm, 0.8mm, 0.65mm, 0.5mm, 0.4mm, 0.3mm, the pin can reach more than 300 feet.
SVP: Surface mount vertical package, a type of surface mount package. The pin terminal is drawn from one side of the package, the pin is bent at a right angle in the middle part, and the end of the bent pin is bonded to the PCB for vertical mounting The package has a small footprint, and the lead pitch is 0.65mm and 0.5mm.
LCCC: Leadless ceramic package carrier, a surface mount package with electrode pads on all four sides of the ceramic substrate without leads, used for high-speed, high-frequency integrated circuit packaging.
PLCC: Leadless plastic package carrier, a plastic packaged LCC. Also used for high-speed, high-frequency integrated circuit packaging.
SOJ: Small outline J-pin package, a type of surface-mount package. The pin terminals are drawn from the two sides of the package and are in a J shape with a pin pitch of 1.27mm.
BGA: Ball grid array package, a type of surface mount package. Two-dimensional array of ball terminals are arranged on the back of the PCB instead of pin pins. The pitch of the solder balls is usually 1.5mm, 1.0mm, 0.8mm Compared with PGA, there is no pin deformation problem.
CSP: Chip-scale package, an ultra-small surface-mount package, the pins are also ball terminals, and the pitch is 0.8mm, 0.65mm, 0.5mm, etc.
TCP: Tape carrier package, a package in which a bare chip is mounted on an insulating tape forming wiring and connected to the wiring. Compared with other surface mount packages, the chip is thinner and the lead pitch is smaller, up to 0.25mm, And the number of pins can reach more than 500 pins
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